INDRBT / Reading room
Interface calculations
Digital engineering model. Payload and repeatability are design targets. All ordinary guide reading, figures and PDFs work here. Links marked Source file lead to the public engineering repository.
Retained digital evidence · electronics/interface_calculations.json · SHA-256 15eab567dde71fbc13c11d0e544290ac57e69bf88d1de0976c1764c47345103b
This readable record comes from the engineering project. Its assumptions, sampling and rule scope remain part of the result.
{
"status": "CALCULATED",
"no_measurements": true,
"limit_closed_v": 0.3,
"limit_release_tau_s": 0.001,
"limit_closure_tau_s": 9.09090909090909e-05,
"encoder_nominal_tau_s": {
"A": 1.0000000000000001e-07,
"B": 1.0000000000000001e-07,
"Z": 1.0000000000000001e-07
},
"optional_rs485_bias_nominal_v_two_terminators": 0.275,
"optional_rs485_bias_worst_v_1pct_resistors_3v_supply": 0.24545454545454543,
"optional_rs485_bias_idle_current_a": 0.004583333333333333,
"optional_bias_threshold_check": "PASS; ideal DC network, excludes leakage/cable effects",
"ldo_conservative_dissipation_bound_w": 0.29292,
"ldo_load_path_dissipation_bound_w": 0.29250000000000004,
"ldo_quiescent_power_allowance_w": 0.00042,
"ldo_conditional_junction_estimate_c": 93.89728,
"selected_fuse": "MF-NSMF025X-2",
"selected_fuse_hold_current_at_40c_a": 0.23,
"fuse_input_current_budget_including_ldo_iq_a": 0.15008,
"fuse_hold_current_margin_at_40c_a": 0.07992000000000002,
"fuse_resistance_drop_check_v": 0.34518399999999994,
"fuse_resistance_power_check_w": 0.05180521471999999,
"conditional_ldo_input_at_low_source_v": 3.9048160000000003,
"power_path_claim_boundary": "Conditional calculation using post-reflow 23 C fuse resistance and 25 C diode drop limit. It does not bound cold/hot resistance, diode drop, startup inrush or measured regulation over temperature.",
"thermal_claim_boundary": "Conditional estimate using nominal output, configured load and datasheet reference IQ/theta_ja. Input fuse/diode drops are neglected and regulator quiescent power is included. This is not a full temperature/tolerance bound; PCB copper/airflow and temperature are unverified.",
"pcb_status": "ROUTED PCB; actual DRC/parity/export evidence is recorded separately in pcb_verification.json"
}