INDRBT / Reading room
Pcb verification
Digital engineering model. Payload and repeatability are design targets. All ordinary guide reading, figures and PDFs work here. Links marked Source file lead to the public engineering repository.
Retained digital evidence · electronics/pcb_verification.json · SHA-256 2f4763645c1bc934e1e92fa58b5a4877024c85e5b88b1a8abf9d13b2fbcdc792
This readable record comes from the engineering project. Its assumptions, sampling and rule scope remain part of the result.
{
"status": "PASS",
"kicad_version": "10.0.6",
"footprint_count": 48,
"schematic_footprint_count": 44,
"mechanical_footprint_count": 4,
"net_count": 28,
"total_net_count_including_nc": 29,
"pin_assignments_checked": 118,
"physical_pad_nets_checked_including_nc": 119,
"track_count": 265,
"via_count": 32,
"board_dimensions_mm": [
100.0,
100.0
],
"copper_layers": 4,
"copper_layer_names": [
"F.Cu",
"In1.Cu",
"In2.Cu",
"B.Cu"
],
"filled_plane_count": 2,
"footprints_with_courtyard": 48,
"native_drc_errors": 0,
"native_drc_warnings": 0,
"native_drc_violations": 0,
"unconnected_items": 0,
"schematic_parity": "PASS",
"schematic_parity_issues": 0,
"native_drc_included_severities": [
"error",
"warning",
"exclusion"
],
"native_drc_factory_ignored_checks": [
{
"description": "Footprint has no courtyard defined",
"key": "missing_courtyard"
},
{
"description": "Track endpoint not centered on via",
"key": "track_not_centered_on_via"
},
{
"description": "Tuning profile track geometries",
"key": "tuning_profile_track_geometries"
},
{
"description": "Footprint doesn't match symbol's footprint filters",
"key": "footprint_filters_mismatch"
},
{
"description": "Footprint component type doesn't match footprint pads",
"key": "footprint_type_mismatch"
}
],
"drc_exclusions": [],
"rule_severity_overrides": {},
"fabrication_rules_mm": {
"max_error": 0.005,
"min_clearance": 0.2,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.15,
"min_text_height": 0.8,
"min_text_thickness": 0.12,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.2,
"min_via_annular_width": 0.15,
"min_via_diameter": 0.6,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"independent_footprint_filter_review": {
"wildcard_matches": 44,
"lexical_mismatches": [],
"review": "All 44 assigned footprints match their stock symbol wildcards. F1 uses a project-local PTC land pattern independently compared against the manufacturer nominal pad drawing; wildcard matching alone does not prove physical suitability."
},
"fuse_manufacturer_land_pattern_review": {
"status": "PASS",
"manufacturer_part_number": "MF-NSMF025X-2",
"footprint": "INDRBT_Interface:PTC_Bourns_MF-NSMF025X_1206",
"actual_pad_size_mm": [
1.0,
1.6
],
"actual_inner_pad_gap_mm": 2.0,
"actual_pad_centres_mm": [
[
-1.5,
0.0
],
[
1.5,
0.0
]
],
"library_and_board_dimensions_agree": true,
"courtyard_covers_maximum_body_and_pads": true,
"source": "https://www.bourns.com/docs/product-datasheets/mf-nsmf.pdf",
"drawing_page_one_based": 8,
"scope": "Selected digital-design part and manufacturer nominal copper land pattern. No measured trip, inrush, solder-process, temperature, sourcing or production qualification. No manufacturer-specific 3D body model is supplied."
},
"local_front_copper_paths": {
"U2_supply_to_C7_mm": 3.5624479758950356,
"RS485_A_main_mm": 28.961067811865476,
"RS485_B_main_mm": 31.417901140947343,
"RS485_main_length_difference_mm": 2.456833329081867
},
"source_sha256": {
"joint_interface.kicad_pcb": "1046bd78d82cd37f4eb656b654840edead73e625d1d94488c067a607fa495aba",
"joint_interface.kicad_sch": "17d7f75f067bb735ad2a5a8c1007acfb8115b868c983112e39b75b617fe1129e",
"joint_interface.kicad_pro": "1cbe4d95a46fe4c8e8a28a635cd5d81d293c97451c79740726e6cffe839bdd1a",
"joint_interface.kicad_dru": "72afecaf275113ea1933885f575e19720a433f4028c2282d8bdac265d51b80cd",
"joint_interface.net.xml": "5ac0ab4f1fd2b76c5331e6ba5b334aeaeac7f965776ebd409f6e87a87a918baa",
"pin_contract.json": "f964f42f6c746b9edde86030eaaf766f3679cf2e9fab22e903129eb435d2d81d",
"pcb_routing_manifest.json": "fe7b57facec8c3229e3e6e82515730150b21ee03c1930d291abb8c55f14d2590",
"pcb_drc_report.json": "295e527e505e5ccad630e0fcfa63394753e84208e8afa102a1d0dd06c1f3e010",
"fp-lib-table": "8706529c4bffd1ff95ca451dc6eb37b535753379b2e98f465347d15e4ec123f0",
"bom.csv": "ec671a33171359cc8ea30326da1bce16b14f887e49c89a561f893ede81e215ad",
"fuse_selection.json": "d7307e63b43cddd03fb902a2b001f3feb4cad1ad048f4b07752ae3dd67d95abf",
"INDRBT_Interface.pretty/PTC_Bourns_MF-NSMF025X_1206.kicad_mod": "9acc77d33b95c382fade04f49c573996e7b85eb81b4c761ceacf350d77f2757b"
},
"scope": "Native PCB geometry, enabled default DRC plus explicit fabrication constraints, schematic parity and independent pad/net audit. No fabricated board, measured EMC/thermal/timing/ESD performance or functional-safety qualification.",
"native_drc_exit_code": 0,
"drc_command": [
"<kicad-cli>",
"pcb",
"drc",
"joint_interface.kicad_pcb",
"--format",
"json",
"--all-track-errors",
"--schematic-parity",
"--severity-all",
"--exit-code-violations",
"--refill-zones",
"--save-board",
"-o",
"pcb_drc_report.json"
],
"fabrication_exports": {
"status": "PASS",
"gerber_layer_file_count": 10,
"excellon_file_count": 2,
"file_sha256": {
"fabrication/assembly_positions.csv": "4474350f610f47511e688de694c2a746be250cebd0a619ad89e567350b4d344c",
"fabrication/drill_report.txt": "fcaeba7dc00c3ea343df74978720366dbc9e1e480c1bd5d786fe381335d93263",
"fabrication/joint_interface-B_Cu.gbl": "6b6babafc4d65ddcf6fa9980e9faa454b7c230d1983f848c6152fc0a8cf71d46",
"fabrication/joint_interface-B_Mask.gbs": "c34db3e05aa24d009ebec519377bc41dae9d01ac0581ee5a3f22faa7262ed757",
"fabrication/joint_interface-B_Silkscreen.gbo": "d18c512d296f1c1a2b9fc5c7a24041c5567ed3a0dc61a4287231d4e5258775e5",
"fabrication/joint_interface-Edge_Cuts.gm1": "14ba07cc0ac564487e493300c3d438cb204d5fd25bfc4105ca830487c3734533",
"fabrication/joint_interface-F_Cu.gtl": "4f4fafbbd15928e6802ba9a6f9aecaf35e93f28174472a4070a4e49d94d6998f",
"fabrication/joint_interface-F_Mask.gts": "bb5e8064735579b688c429ae1234741be0018fa29d117d5f40a98a58db8d72b5",
"fabrication/joint_interface-F_Paste.gtp": "21c7139460ad4908c3b8b6ffdd498e693e7b16e7566b123d0acefbc06bddd488",
"fabrication/joint_interface-F_Silkscreen.gto": "f916a2fb844d68094457b37da84a6d1c267e9e833a5625588d3d2dffa3e0a849",
"fabrication/joint_interface-In1_Cu.g1": "42f2702e984590a051dfad38db8a2fd73f5520a50930b1dbf756c60e8864eda9",
"fabrication/joint_interface-In2_Cu.g2": "ca60152978af0128991dcbdaab25f796a15823ac24b5ade1104afc32e6e1d517",
"fabrication/joint_interface-job.gbrjob": "6987f2c5dcc02fd6798df9246c5c4fa24a3e3ca930db76bd65bae676878c95ab",
"fabrication/joint_interface-NPTH-drl_map.pdf": "70166ccfdce8208a04b4985f89f7698a46cd84a9114cb5b1a4c35509a3e8d6a7",
"fabrication/joint_interface-NPTH.drl": "21f5a881fde83b8f739b65b6a90dda96832baef3d9d97db6c9aa4e473d766f78",
"fabrication/joint_interface-PTH-drl_map.pdf": "92cec92b5d978406f468f1568b0924f8b3fce750c8d1c615012ee0b3bb7092a1",
"fabrication/joint_interface-PTH.drl": "6fc271e3cf238061bc59adbbc3ec5cc8390c1a0a32accd24654cff435bc7286c",
"fabrication/joint_interface.d356": "6705e64e52da536e9d8c6a1fd50a762e4fdf6a7e7ecdd2dc87f19dc359f26c36",
"fabrication/joint_interface_fabrication.zip": "f576b4527e29139bf2787a5840c7d570e261fae9cd353b2dedd36a172c83bb1b"
},
"scope": "Native export success and nonempty layer/drill checks; manufacturer CAM approval and assembly qualification are not performed."
},
"review_exports": [
"exports/pcb_3d.png",
"exports/pcb_assembly.svg",
"exports/pcb_bottom.svg",
"exports/pcb_ground_plane.svg",
"exports/pcb_layers.pdf",
"exports/pcb_power_plane.svg",
"exports/pcb_top.png",
"exports/pcb_top.svg"
],
"review_export_sha256": {
"exports/pcb_3d.png": "867b52624cb3f8fc48bd46c8d17a8c2a012df8bcce379361e4068f776cbaaa77",
"exports/pcb_assembly.svg": "f1cb878577919ff146df28ce9abb0087245cc92a38621ae14cf1fe419b7ea40d",
"exports/pcb_bottom.svg": "f86e790cd2c22407e2cc2c2a0c9a2d4669d80c7fb20b4327be82fe0ef7eae5ac",
"exports/pcb_ground_plane.svg": "69402a1772fe6a160865972a95d155c0c6754504ed14e78d2ebcc225af79c489",
"exports/pcb_layers.pdf": "605b982c84d257225739f7a1ae9679c7c54262e9de9c38b02d66e554c24012e8",
"exports/pcb_power_plane.svg": "0f08b551b29bd0d4432aa6c8d0b3723bc66eaa28424f957157b1a02a6b9a8b7f",
"exports/pcb_top.png": "ed44e2825037beecdcb14281dfcab27a09dc4a617d97919278cd75b916f48ed3",
"exports/pcb_top.svg": "3546de002b84080492ff8d9fb111aebe21a53d794bf50fb5bdaad4b2968195d5"
},
"review_render_refreshed": true,
"export_source_board_sha256": "1046bd78d82cd37f4eb656b654840edead73e625d1d94488c067a607fa495aba"
}